Based on the EP1C3, the F1 features 2900 LE’s, 65 user I/O, and 7.5KB of user ram. Of course the standard Arduino, PMOD, and ASM carrier headers will be provided for additional RAM or other peripheral devices.
The Amani F1 is intended to be an entry-level FPGA development system, compatible with the Arduino. A fantastic feature of the F1, called Signal Tap, inherent to Quartus II and available only to FPGA devices, serves as an embedded logic analyzer that can display recorded or real-time data via the JTAG programmer. In short the F1 can be a logic analyzer for the Arduino and compatible shields, as well as serving as a high-speed co-processor or controller.
Amani F1 Features at a glance:
Altera EP1C3 Cyclone FPGA
7.5KB On-Chip Memory
Signal Tap Compatible
-Arduino Shield Stackable
-65 user I/O (Full Arduino Connectivity, 6 Digilent PMOD docks)
-Full Arduino I/O Coverage
-6 Standard Digilent PMod Compatible I/O Docks
-Application-Specific Module (ASM) Carriers
-Carries Application-Specific Daughter-Boards
-Connectors follow standard 8-pin “Dock” format